Integrated circuit and battery powered electronic device

ABSTRACT

An integrated circuit ( 100 ) has a circuit portion ( 102 ) that can be switched to a standby mode through an enable transistor ( 104 ), which is coupled between an internal power supply line ( 120 ) and an external power supply line ( 130 ). The enable transistor ( 104 ) is controlled by control circuitry via a control line ( 160 ). The control line ( 160 ) is coupled to the gates of a first transistor ( 152 ) and a further transistor ( 154 ) of a logic gate ( 150 ). The substrate of the further transistor ( 154 ) is coupled to a backbias generator ( 170 ). Consequently, when the enable transistor ( 104 ) is switched off, the further transistor ( 154 ) is enabled and applies a substantial backbias to the gate of the enable transistor ( 104 ), thus dramatically reducing the leakage current from the circuit portion ( 102 ) through the enable transistor ( 104 ).

The present invention relates to an integrated circuit, comprising:

-   -   an external power supply line, an internal power supply line,    -   a circuit portion coupled to the internal power supply line, an        enable transistor for coupling the internal power supply line to        the external line; and control means coupled to a gate of the        enable transistor for switching the enable transistor to a        conductive state with a first gate voltage, and to a        non-conductive state with a second gate voltage.

The present invention further relates to a battery-powered electronicdevice having such an integrated circuit.

An embodiment of such an integrated circuit is known from from IEEEJournal of Solid State Circuits, Vol. 32 (1); p. 52-61, 1997.

In the art of IC design, the ongoing downscaling of transistordimensions allows for an increase of the transistor density on an IC,which enables the development of increasingly complex ICs. However, theincrease in transistor density also introduces significantcomplications. Apart from the increase of noise, cross-talk and numerousdesign technology pitfalls, to name but a few problems, these very largescale integrated (VLSI) circuits also consume large amounts of powerduring operation. In addition, with the reduction of transistordimensions and supply voltage, the threshold-voltage (VT) of thesetransistors is usually lowered as well, to enable high-frequencyswitching of the transistors. This causes an increase in the leakagecurrents for these transistors, which adds to the total powerconsumption of the circuit and to the standby current in particular.This especially causes problems in terms of battery lifetime forbattery-powered devices that include such circuitry, like hand-helddevices, lap top computers, mobile phones, portable CD players and soon. Therefore, low-power consumption is an important issue in the designof the ICs, particularly when these ICs are being used in such devices.

The complementary metal oxide semiconductor (CMOS) circuit known fromthe aforementioned prior art has a low-power design by the presence ofan enable transistor coupled to the control circuitry for coupling theexternal power line to the internal power line, e.g. a pMOS high-V_(T)transistor coupled between the external supply line (V_(dd, ext)) andthe internal supply line (V_(dd, int)) of the circuit. The high-V_(T)transistor is controlled by an enable/disable control signal from thecontrol circuitry by switching the gate voltage of the enable transistorbetween a first gate voltage and a second gate voltage, thusenabling/disabling the current supply to the circuit portion. Byswitching off large parts of an IC, for instance during stand-by mode ofan e.g. battery-powered device, a significant saving of consumed poweris achieved, resulting in increased battery lifetime. The use of ahigh-V_(T) transistor reduces the leakage currents from the circuitportion in stand-by mode by one or two decades.

The disadvantage of using a high-V_(T) transistor is that a differenttechnology has to be used for the enable transistor than the technologybeing used for the circuit portion, which increases the complexity ofthe IC design and the IC production cost. In addition, in order to avoida significant voltage drop over a high-V_(T) transistor, such atransistor must be relatively large, which adds to the overall area ofthe integrated circuit, which also increases the IC production cost.

It is an object of the present invention to provide an integratedcircuit of the kind described in the opening paragraph in which theenable transistor can be realized in the same technology as the circuitportion without increasing the standby leakage current compared to ahigh-V_(T) enable transistor.

Now, the object is realized in that the control means are arranged toreduce a leakage current through the enable transistor in thenon-conductive state by biasing the second gate voltage.

By biasing the second gate voltage, e.g. applying a gate backbiasvoltage to the gate of the enable transistor, the voltage gap betweenthe threshold voltage of the enable transistor and the voltage of theenable transistor in its non-conductive state is widened. This canresult in a significant reduction of the standby leakage current fromthe circuit portion through the transistor; for instance, a gatebackbias voltage of just 100 mV reduces the subthreshold leakage currentthrough the transistor with a factor 10-15, and application of a gatebackbias of a few volts decreases the subthreshold leakage by more than10 decades. Although other leakage current paths exist in an IC, thesubthreshold leakage currents of transistors is the predominantcontribution to the overall current leakage in deep-submicrontechnologies, which stipulates the importance of the present invention.

In a preferred embodiment, the control means comprise a furthertransistor having a substrate that is conductively insulated from a bulksubstrate of the integrated circuit, the substrate being coupled to abias voltage source, and the further transistor being responsive to acontrol signal for switching the enable transistor to a non-conductivestate. At this point, it noted that the use of substrate and/or wellbackbias voltage techniques to reduce leakage currents is known from theart. For instance, U.S. Pat. No. 5,744,996 discloses a CMOS circuitwhich can be tuned to operate at different supply voltages by applying abackbias voltage to the substrate of the transistors in the circuit. Inanother U.S. Pat. No. , e.g. 6,124,752, a solution has been provided forthe problem of having to apply a third supply voltage, e.g. the backbiasvoltage next to the nominal supply voltage V_(dd) and ground supplyvoltage V_(ss) of the circuit, by using a charge pump being responsiveto dedicated control circuitry for removing charges from the substrate.The common approach of the architectures described in these patents is,however, to either apply backbias voltages to a part of the cicuit, e.g.a circuit portion, in which case triple-well technologies or otherinsulating techniques are required, or to apply it the whole circuit.However, the application of backbias voltages to large parts of theintegrated circuit has the disadvantage that a backbias generator like acharge pump has to control large volumes of substrate, which has anegative effect on either the size of the backbias generator or on theactual time period in which the application of the backbias iseffectuated. In addition, it is expected the positive effect of applyingbackbias voltages to reduce leakage currents will become smaller withthe further downscaling of technology dimensions because of the expectedreduction of the so-called k-factor, as expressed in the followingformula:V _(T) =V _(x) +k{square root}(V _(sb)+2φ_(F))with V_(T) being the threshold voltage, V_(x) being a process relatedconstant threshold voltage term, k being the body factor or k-factorwhich depends on the oxide capacitance per unit area oxide in thetechnology, φ_(F) being the Fermi level, and V_(sb) being thesource-bulk or backbias voltage. It will be recognized by those skilledin the art that with a decreasing k-factor, the impact of the backbiason the increase of the threshold voltage will become more moderate,which results in a smaller reduction of leakage currents from thecircuit or circuit portions.

It is emphasized that the aforementioned embodiment does notsignificantly suffer from this expected deterioration of the impact ofthe k-factor; both the circuit portion and the enable transistor arerealized in a default technology, while the transistor being responsiblefor generating the backbias voltage to be applied to the gate of theenable transistor is connected to a backbias source. Therefore, thistransistor, but not the circuit portion and the enable transistor, willexperience increased leakage currents in standby as a result of thereduced k-factor in future technologies, which is a negligiblecontribution to the leakage currents of an IC typically having millionsof transistors. Furthermore, the realization of the vast majority of theIC in a standard technology, e.g. CMOS technology, has the advantagethat standard library cells using the nominal power supply lines V_(dd)and V_(ss) can be used for both the circuit portion and the enabletransistor and that the power supply line routing issues for applyingthe backbias voltage remain limited to the transistor responsible forgenerating the gate backbias of the enable transistor. In addition,because of the modest size of the substrate area of the transistor beingresponsible for generating the backbias voltage to be applied to thegate of the enable transistor, the backbias can be rapidly established,in contrast to the known backbias applications, where more substantialsubstrate areas have to be biased.

It is an advantage if the bias voltage source comprises a backbiasgenerator being responsive to the control signal.

By making the backbias generator responsive to the control signal, thebackbias generator is only switched on when necessary, e.g. when thecircuit portion is switched to a standby mode, which reduces the powerconsumption of the backbias generator.

An important quality of battery powered devices is the length of theoperational period; i.e. the period in which the device will functionwithout having to recharge the batteries. Typically, an increase of theoperational period of such a device strengthens its market positionconsiderably, which is especially the case for mobile phones and laptopcomputers, to name but a few battery powered devices. Battery powereddevices utilizing an IC according to the invention can provide longeroperational times due to the fact that large parts of the IC can beswitched off with a dramatic reduction of the leakage currents from thecircuit portions in standby mode, which improves the market position ofthe device as a whole.

The integrated circuit and device according to the invention aredescribed in more detail and by way of non-limiting examples withreference to the accompanying drawings, wherein:

FIG. 1 shows a circuit with an on/off switching facility according to anembodiment of the invention; and

FIG. 2 shows a battery powered device having an integrated circuit withan on/off switching facility according to the invention.

In FIG. 1, integrated circuit 100 has a circuit portion 102. Circuitportion 102 is coupled between a power supply line 110 and an internalpower supply line 120, which is coupled to an external power supply line130 by enable transistor 104. Optionally, a decoupling capacitor 106 iscoupled between power supply line 110 and internal power supply line 120for compensating glitches in the power supply voltage during powerup ofcircuit portion 102. The gate of enable transistor 104 is coupled to alogic gate 150, e.g. an inverter, having a transistor 152 for generatinga first gate voltage for switching the enable transistor 104 to aconductive state and a further transistor 154 for generating a secondgate voltage for switching the enable transistor 104 to a non-conductivestate. Other logic gates can be used without departing from the scope ofthe invention.

The substrate of the further transistor 154 is coupled to a backbiassource 170, e.g. a backbias generator like a charge pump or anotherknown device for generating a backbias, via the backbias power supplyline 140. The gates of transistor 152 and further transistor 154 arecoupled to control circuitry not shown via a control signal line 160. Itis emphasized that, for reliability reasons, transistor 154 ispreferably implemented as a cascade of two transistors in order towithstand the increased gate-source and gate-drain voltages that resultfrom the applied backbias when transistor 154 is switched to aconductive state. The control circuitry not shown, which can beintegrated into the integrated circuit 100 or be positioned at leastpartly outside integrated circuit 100, is used to control theoperational mode of the circuit portion 102, e.g. either in active or instandby mode. Optionally, backbias source 170 is also connected tocontrol signal line 160, as indicated by the dashed part of this line,in the case that backbias source 170 has been made responsive to thecontrol circuitry as well. In FIG. 1, backbias source 170 is integratedin the integrated circuit 100, since this is the preferred arrangement.However, it will be obvious to those skilled in the art that an externalbackbias source coupled to the further transistor 154 via an input pinnot shown of the integrated circuit 100 can also be used withoutdeparting from the teachings of the present invention.

In the embodiment shown in FIG. 1, power supply line 110 is a V_(dd)line, internal power supply line 120 is an internal V_(ss) line, andexternal power supply line 130 is an external V_(ss) line, with enabletransistor 104 being an nMOS transistor. This is the preferredembodiment, because nMOS transistors have a better conductance than pMOStransistors, which is useful when large currents have to flow throughthe circuit portion 102 in its active mode. In this embodiment, thebackbias applied to the enable transistor is in fact a negative voltage,preferably of several volts. However, it will be understood by thoseskilled in the art that power supply line 110 can be a V_(ss) line,internal power supply line 120 can be an internal V_(dd) line, andexternal power supply line 130 can be an external V_(dd) line, withenable transistor 104 being an pMOS transistor without departing fromthe scope of the invention. In the latter case, the applied backbiaswill be a more positive voltage than V_(dd) to increase the gap betweenthe gate voltage and the threshold voltage of the pMOS transistor 104.Also, a combination of enable transistors between both an internal andexternal V_(dd) power supply line as well as in between an internal andexternal V_(ss) power supply line can be thought of without departingfrom the scope of the invention.

FIG. 2 is described with backreference to the detailed description ofFIG. 1. Corresponding reference numerals have the same meaning unlessstated otherwise. In FIG. 2, a battery powered electronic device 200,e.g. a handheld computer, a laptop computer, a personal assistant, amobile phone and so on, incorporates an integrated circuit 100 accordingto the present invention. Only external power supply line 130 ofintegrated circuit 100 is explicitly shown in FIG. 2; this is done forreasons of clarity only. External power supply line 130 is coupled to acontact 222 of battery container 220; the connection between contact 224of battery container 220 and power supply line 110 is not shown forreasons of clarity. In standby mode of circuit portion 102, the batterynot shown in battery container 220 will have to provide hardly any powerto circuit portion 102 because of the applied backbias to the gate ofenable transistor 104. The circuit portion 102 will be switched to astandby mode under control of the control circuitry not shown; thiscontrol circuitry can either be partly or completely integrated in thebattery powered electronic device 200 outside the integrated circuit100, or can be integrated into integrated circuit 100. The presence ofintegrated circuit 100 according to the present invention drasticallyincreases the lifetime of the battery not shown of a battery poweredelectronic device 200, which increases its marketability significantly,because the stand alone operation time, e.g. the time that batterypowered electronic device 200 can operate without being connected to apower supply other than the battery, is an important feature formarketing such products.

It should be noted that the above-mentioned embodiments illustraterather than limit the invention, and that those skilled in the art willbe able to design many alternative embodiments without departing fromthe scope of the appended claims. In the claims, any reference signsplaced between parentheses shall not be construed as limiting the claim.The word “comprising” does not exclude the presence of elements or stepsother than those listed in a claim. The word “a” or “an” preceding anelement does not exclude the presence of a plurality of such elements.In the device claim enumerating several means, several of these meanscan be embodied by one and the same item of hardware. The mere fact thatcertain measures are recited in mutually different dependent claims doesnot indicate that a combination of these measures cannot be used toadvantage.

1. An integrated circuit (100), comprising: an external power supplyline (130); an internal power supply line (120); a circuit portion (102)coupled to the internal power supply line (120); an enable transistor(104) for coupling the internal power supply line (120) to the externalpower supply line (130); and control means (150, 160) coupled to a gateof the enable transistor (104) for switching the enable transistor (104)to a conductive state with a first gate voltage, and to a non-conductivestate with a second gate voltage, characterized in that the controlmeans (150, 160) are arranged to reduce a leakage current through theenable transistor (104) in the non-conductive state by biasing thesecond gate voltage.
 2. An integrated circuit (100) as claimed in claim1, characterized in that the control means (150) comprise a furthertransistor (154) having a substrate that is conductively insulated froma bulk substrate of the integrated circuit, the substrate being coupledto a bias voltage source (170), and the further transistor (154) beingresponsive to a control signal for switching the enable transistor (104)to a non-conductive state.
 3. An integrated circuit (100) as claimed inclaim 2, characterized in that the bias voltage source (170) comprises abackbias generator being responsive to the control signal.
 4. Abattery-powered electronic device (200), comprising a power supply line(230) coupled to a contact (222) of a battery container (220),characterized in that the power supply line (230) is coupled to anexternal power supply line (130) of an integrated circuit (100)according to claim 1.